A CMOS delta-sigma true RMS converter

Conventionally, monolithic electronics true rms converters are constructed by bipolar circuitry. This paper describes a new architecture based on delta-sigma (/spl Delta//spl Sigma/) modulation to realize a low-cost rms converter in CMOS technologies, especially intended for handheld digital multimeters. The signal-to-quantization noise ratio as well as transfer characteristics of this architecture have been deduced to obtain initial design parameters. The use of an indirect charge transfer technique makes the converter gain depend only on an on-chip capacitor ratio, reducing gain drift and offering good gain accuracy. Measured results show that this converter achieves a signal-to-noise ratio of 88 dB and a relative error of /spl plusmn/0.2% for arbitrary inputs with a signal crest factor up to three. The signal bandwidth exceeds 50 kHz, and the full-scale input range is greater than 0.4 V/sub rms/. Without trimming and calibration, this converter has an absolute gain error less than /spl plusmn/0.4%. This chip is fabricated in a 0.8-/spl mu/m double-poly, double-metal CMOS process and occupies active area of 1 mm/sup 2/.