A double-sampling pseudo-two-path bandpass /spl Delta//spl Sigma/ modulator

Author

Liu, Shen-Iuan ; Kuo, Chien-Hung ; Tsai, Ruey-Yuan ; Wu, Jingshown

Author_Institution

Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan

Volume

35

Issue

2

fYear

2000

Firstpage

276

Lastpage

280

Abstract

A double-sampling pseudo-two-path bandpass /spl Delta//spl Sigma/ modulator is proposed. This modulator has an output rate equal to twice the clock rate, uses n/2 operational amplifiers (op-amps) for an nth-older noise transfer function, and has reduced clock feedthrough in the signal path band. The required clocks can be simpler to implement than the conventional pseudo-two-path techniques. The measured signal-to-noise ratio and dynamic range of the fourth-order double-sampling pseudo-two-path bandpass /spl Delta//spl Sigma/ modulator in a 30-kHz bandwidth at a center frequency of 2.5 MHz (at a clock frequency of 5 MHz) are 62 and 68 dB, respectively.

Keywords

CMOS integrated circuits; band-pass filters; delta-sigma modulation; modulators; operational amplifiers; signal sampling; 2.5 MHz; 30 kHz; 5 MHz; 62 dB; DAC; SNR; bandpass delta-sigma modulator; clock feedthrough reduction; double-sampling /spl Delta//spl Sigma/ modulator; dynamic range; fourth-order type; nth-older noise transfer function; op-amps; operational amplifiers; pseudo-two-path /spl Delta//spl Sigma/ modulator; signal-to-noise ratio; Band pass filters; Capacitors; Charge transfer; Circuit analysis; Circuit noise; Clocks; Delta modulation; Equivalent circuits; Sampling methods; Voltage;

fLanguage

English

Journal_Title

Solid-State Circuits, IEEE Journal of

Publisher

ieee

ISSN

0018-9200

Type

jour

DOI

10.1109/4.823453

Filename

823453