High voltage floating gate array transistors

A new high voltage field-effect transistor is described. It features an array of uncontacted gate elements between the main gate and the drain which float so as to inhibit avalanche breakdown. Good agreement is obtained between model predictions and the performance of experimental devices fabricated in Si-TaSi₂ semiconductor-metal eutectic material. Transistors are demonstrated which hold off up to 1000 V, compared with the avalanche breakdown potential of 300 V or less expected for conventional devices made with similarly doped silicon.