DocumentCode
1300592
Title
Algorithms for multiplication in Galois field for implementation using systolic arrays
Author
Bandyopadhyay, S. ; Sengupta, A.
Author_Institution
Sch. of Comput. Sci., Windsor Univ., Ont., Canada
Volume
135
Issue
6
fYear
1988
fDate
11/1/1988 12:00:00 AM
Firstpage
336
Lastpage
339
Abstract
Operations in finite fields find diverse applications. Circuits have been designed for carrying out such operations. In the paper, two circuits that carry out multiplication in GF(2p) have been presented. These circuits are suitable for implementation using VLSI techniques and are simpler than existing circuits. The architecture used is that of systolic arrays and consists of regular interconnection of simple cells.
Keywords
cellular arrays; digital arithmetic; Galois field; VLSI techniques; finite fields; multiplication algorithms; regular interconnection; systolic arrays;
fLanguage
English
Journal_Title
Computers and Digital Techniques, IEE Proceedings E
Publisher
iet
ISSN
0143-7062
Type
jour
Filename
6549
Link To Document