DocumentCode
1301543
Title
-Gated Silicon and Strained Silicon Nanowire Array Tunneling FETs
Author
Richter, S. ; Sandow, C. ; Nichau, A. ; Trellenkamp, S. ; Schmidt, M. ; Luptak, R. ; Bourdelle, K.K. ; Zhao, Q.T. ; Mantl, S.
Author_Institution
Peter Grunberg Inst. 9, JARA-FIT, Forschungszentrum Julich, Jülich, Germany
Volume
33
Issue
11
fYear
2012
Firstpage
1535
Lastpage
1537
Abstract
This letter presents experimental results on tunneling field-effect transistors featuring arrays of Ω-gated uniaxially strained and unstrained silicon nanowires. The gate control of a SiO2/poly-Si gate stack is compared with a high-k/metal gate stack. Steep inverse subthreshold slopes down to 76 mV/dec and relatively high on-currents were achieved with the combination of high-k/metal gate and strained silicon nanowires. We observed negative differential conductance in the output characteristics, which we attribute to hot-carrier effects in the strong electric fields at the reverse-biased tunnel junction.
Keywords
field effect transistors; high-k dielectric thin films; hot carriers; nanowires; silicon compounds; tunnel transistors; Ω-gated silicon; Ω-gated uniaxially strained nanowires; SiO2; electric fields; gate control; high-k-metal gate stack; hot-carrier effects; negative differential conductance; polysilicon gate stack; reverse-biased tunnel junction; strained silicon nanowire array tunneling FET; tunneling field-effect transistors; unstrained silicon nanowires; FETs; Hafnium compounds; Nanowires; Silicon on insulator technology; Tunneling; Nanowire; strained silicon-on-insulator (sSOI); subthreshold slope; tunneling field-effect transistor (TFET);
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2012.2213573
Filename
6313886
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