• DocumentCode
    1301659
  • Title

    Low Power Sparse Approximation on Reconfigurable Analog Hardware

  • Author

    Shapero, Samuel ; Charles, Adam S. ; Rozell, Christopher J. ; Hasler, Paul

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Georgia Inst. of Technol., Atlanta, GA, USA
  • Volume
    2
  • Issue
    3
  • fYear
    2012
  • Firstpage
    530
  • Lastpage
    541
  • Abstract
    Compressed sensing is an important application in signal and image processing which requires solving nonlinear optimization problems. A Hopfield-Network-like analog system is proposed as a solution, using the locally competitive algorithm (LCA) to solve an overcomplete l1 sparse approximation problem. A scalable system architecture using sub-threshold currents is described, including vector matrix multipliers (VMMs) and a nonlinear thresholder. A 4 × 6 nonlinear system is implemented on the RASP 2.9v chip, a field programmable analog array with directly programmable floating gate elements, allowing highly accurate VMMs. The circuit successfully reproduced the outputs of a digital optimization program, converging to within 4.8% rms, and an objective value only 1.3% higher on average. The active circuit consumed 29 μA of current at 2.4 V, and converges on solutions in 240 μs. A smaller 2 × 3 system is also implemented. Extrapolating the scaling trends to a N=1000 node system, the analog LCA compares favorably with state-of-the-art digital solutions, using a small fraction of the power to arrive at solutions ten times faster. Finally, we provide simulations of large scale systems to show the behavior of the system scaled to nontrivial problem sizes.
  • Keywords
    field programmable analogue arrays; sparse matrices; Hopfield network-like analog system; active circuit; compressed sensing; digital optimization program; field programmable analog array; image processing; locally competitive algorithm; low power sparse approximation; nonlinear optimization problem; nonlinear system; nonlinear thresholder; programmable floating gate elements; reconfigurable analog hardware; scalable system architecture; signal processing; sparse approximation problem; subthreshold current; vector matrix multipliers; Approximation methods; Compressed sensing; Computer architecture; Hopfield neural networks; Neural networks; Optimization; Virtual machine monitors; Compressed sensing; Hopfield neural networks; convex optimization; field programmable analog arrays;
  • fLanguage
    English
  • Journal_Title
    Emerging and Selected Topics in Circuits and Systems, IEEE Journal on
  • Publisher
    ieee
  • ISSN
    2156-3357
  • Type

    jour

  • DOI
    10.1109/JETCAS.2012.2214615
  • Filename
    6313932