Title :
Applying an XC6200 to real-time image processing
Author :
Woods, Roger ; Trainor, David ; Heron, Jean-paul
Author_Institution :
Queen´´s Univ., Belfast, UK
Abstract :
This implementation of a two-dimensional discrete cosine transform demonstrates the development of a suitable architectural style for a specific technology-in this case, the Xilinx XC6200 FPGA series. The design exploits distributed arithmetic, parallelism, and pipelining to achieve high-performance custom-computing implementation
Keywords :
digital signal processing chips; discrete cosine transforms; field programmable gate arrays; image processing; parallel architectures; XC6200; Xilinx XC6200 FPGA; custom-computing; discrete cosine transform; distributed arithmetic; parallelism; pipelining; real-time image processing; Circuits; Field programmable gate arrays; Flip-flops; Image processing; Logic functions; Multiplexing; Parallel processing; Pipeline processing; Routing; Throughput;
Journal_Title :
Design & Test of Computers, IEEE
