• DocumentCode
    1301668
  • Title

    Universal fault diagnosis for lookup table FPGAs

  • Author

    Inoue, Tomoo ; Miyazaki, Satoshi ; Fujiwara, Hideo

  • Author_Institution
    Nara Inst. of Sci. & Technol., Japan
  • Volume
    15
  • Issue
    1
  • fYear
    1998
  • Firstpage
    39
  • Lastpage
    44
  • Abstract
    Focusing on configurable logic blocks in a lookup table FPGA, the authors present universal fault diagnosis procedures that can locate a fault to just one CLB. The complexity of the proposed procedure for FPGAs using block-sliced loading is independent of FPGA array size
  • Keywords
    computational complexity; fault diagnosis; field programmable gate arrays; logic testing; table lookup; FPGAs; block-sliced loading; complexity; configurable logic blocks; fault diagnosis; lookup table; universal fault diagnosis; Circuit faults; Fault diagnosis; Field programmable gate arrays; Flip-flops; Functional programming; Integrated circuit interconnections; Logic functions; Multiplexing; Table lookup; Testing;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/54.655181
  • Filename
    655181
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1301668