Analysis of the photosite reset in FGA image sensors

An analysis of the photosite reset mechanism in floating gate array image sensors is presented. The photosite elements in these devices consist of a JFET transistor with the gate capacitively coupled to an address line. The addressed cell is reset by forward biasing the gate-drain junction. During evaluation of the first prototype samples it was found that this reset method has some disadvantages for the device dynamic range and the cell-to-cell signal interference. To eliminate these problems, a method of resetting the photocell using the source-gate junction has been developed and experimentally tested. An analysis of the reset method in the steady-state and transient modes of operation is presented as well as an analysis of noise. The results are used to explain the observation of an image lag which has been detected in these sensors and to calculate the photosite sensitivity which is related to the photosite noise floor. It is shown that the introduction of a small amount of bias charge into the photosite improves the image lag characteristic; however, an ideal solution of this problem is not described