DocumentCode
1302423
Title
A novel retina chip with simple wiring for edge extraction
Author
Ikeda, Hitoshi ; Tsuji, Kiyotaka ; Asai, Tetsuya ; Yonezu, Hiroo ; Shin, Jang-Kyoo
Author_Institution
Dept. of Electr. & Electron. Eng., Toyohashi Univ. of Technol., Japan
Volume
10
Issue
2
fYear
1998
Firstpage
261
Lastpage
263
Abstract
A novel silicon retina chip based on the information processing in the vertebrate retina was designed and fabricated. The chip has a novel wiring structure in which all pixels are connected through the channel of MOS transistors, which simplifies a wiring structure compared with conventional resistive networks. The proposed structure minimizes the pixel area and certainly increases a fill factor since each pixel consists of only two photodiodes and three MOS transistors. Experimental results showed that the chip could extracted the edge of input images successfully. Furthermore, it was shown that the chip could operate over a wide range of light intensities by adjusting its spatial resolution.
Keywords
MESFET integrated circuits; computer vision; edge detection; eye; integrated circuit design; integrated optoelectronics; photodiodes; silicon; MOS transistors; Si; edge extraction; fill factor; information processing; light intensities; optical design; optical fabrication; photodiodes; pixel area; resistive networks; retina chip; silicon retina chip; spatial resolution; vertebrate retina; wiring; wiring structure; Circuits; Data mining; Image edge detection; MOSFETs; Optical sensors; Photoreceptors; Retina; Silicon; Smoothing methods; Wiring;
fLanguage
English
Journal_Title
Photonics Technology Letters, IEEE
Publisher
ieee
ISSN
1041-1135
Type
jour
DOI
10.1109/68.655378
Filename
655378
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