• DocumentCode
    1302787
  • Title

    Highly parallel, fast scaling of numbers in nonredundant residue arithmetic

  • Author

    Ulman, Zenon D. ; Czyzak, Maciej

  • Author_Institution
    Electr. Fac., Tech. Univ. Gdansk, Poland
  • Volume
    46
  • Issue
    2
  • fYear
    1998
  • fDate
    2/1/1998 12:00:00 AM
  • Firstpage
    487
  • Lastpage
    496
  • Abstract
    A new approach to scaling in the nonredundant residue number system (RNS) with the use of the Chinese remainder theorem (CRT) is presented. The auxiliary scaling by M, where M is the number range, is performed in parallel with scaling by the scale factor K in order to avoid the number range overflow. The scaler design utilizes small look-up tables and multioperand (both modulo and binary) adders. The new approach does not impose restrictions on the form, size, and number of moduli n. The only proviso is that K>n. The scaling error is bounded by n and can be reduced to 1 or 1.5 if a correction circuit is employed. Hardware complexity expressed by the number of transistors is approximately one order smaller than that for the earlier design, whereas the scaler latency is similar
  • Keywords
    adders; error correction; parallel processing; read-only storage; residue number systems; table lookup; Chinese remainder theorem; ROM; auxiliary scaling; binary adders; correction circuit; digital signal processing; fast scaling; hardware complexity; look-up tables; multioperand modulo adders; nonredundant residue arithmetic; nonredundant residue number system; number range overflow; parallel scaling; scaler design; scaler latency; scaling error; transistors; Adders; Arithmetic; Cathode ray tubes; Circuits; Decoding; Delay; Digital signal processing; Dynamic range; Error correction; Hardware;
  • fLanguage
    English
  • Journal_Title
    Signal Processing, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1053-587X
  • Type

    jour

  • DOI
    10.1109/78.655432
  • Filename
    655432