DocumentCode
1302828
Title
A System-On-Chip Bus Architecture for Thwarting Integrated Circuit Trojan Horses
Author
Kim, Lok-Won ; Villasenor, John D.
Author_Institution
Electr. Eng. Dept., Univ. of California, Los Angeles, CA, USA
Volume
19
Issue
10
fYear
2011
Firstpage
1921
Lastpage
1926
Abstract
While the issue of Trojan ICs has been receiving increasing amounts of attention, the overwhelming majority of anti-Trojan measures aim to address the problem during verification. While such methods are an important part of an overall anti-Trojan strategy, it is statistically inevitable that some Trojans will escape verification-stage detection, in particular in light of the increasing size and complexity of system-on-chip (SoC) solutions and the increasing use of third-party designs. In contrast with much of the previous work in this area, we specifically focus on run-time methods to identify the attacks of a Trojan and to adapt the system and respond accordingly. We describe a solution including a bus architecture in which the arbitration, address decoding, multiplexing, wrapping, and other components protect against malicious use of the bus.
Keywords
computer architecture; invasive software; system buses; system-on-chip; Trojan IC; Trojan horse; address decoding; antiTrojan measures; bus architecture; malicious use; multiplexing; run-time method; system-on-chip; verification-stage detection; wrapping; Built-in self-test; Decoding; Logic gates; System-on-a-chip; Trojan horses; AMBA; bus architecture; integrated circuit (IC) Trojan horses; malicious hardware; system-on-chip (SoC);
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2010.2060375
Filename
5556060
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