DocumentCode :
1303050
Title :
Modular decomposition of combinatorial multiple-values circuits
Author :
Fang, Kwang-ya ; Wojcik, Anthony S.
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Illinois Univ., Chicago, IL, USA
Volume :
37
Issue :
10
fYear :
1988
fDate :
10/1/1988 12:00:00 AM
Firstpage :
1293
Lastpage :
1301
Abstract :
A decomposition approach to the modular design of multiple-valued logic functions is discussed. Systematic procedures to utilize a fixed set of building blocks from which an arbitrary function can be designed are illustrated. The building blocks are composed of T gates (multiplexers). The first step is the partitioning of all logic functions into classes. Representative building blocks for each class are then developed. Finally, optimization techniques are described that reduce the number of building blocks required in the design. This approach is, in principle, applicable to functions in any radix and will always yield a design for the target function. Examples are presented to illustrate the approach for ternary functions
Keywords :
combinatorial circuits; many-valued logics; combinatorial multiple-values circuits; logic functions; modular decomposition; multiplexers; optimization; ternary functions; Automatic control; Circuit faults; Circuit testing; Fault tolerance; Integrated circuit interconnections; Logic design; Logic functions; Notice of Violation; Space technology; Very large scale integration;
fLanguage :
English
Journal_Title :
Computers, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9340
Type :
jour
DOI :
10.1109/12.5993
Filename :
5993
Link To Document :
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