• DocumentCode
    1303716
  • Title

    An Introduction to High-Level Synthesis

  • Author

    Coussy, Philippe ; Gajski, Daniel D. ; Meredith, Michael ; Takach, Andres

  • Author_Institution
    Lab.-STICC, Univ. de Bretagne-Sud, France
  • Volume
    26
  • Issue
    4
  • fYear
    2009
  • Firstpage
    8
  • Lastpage
    17
  • Abstract
    High-level synthesis raises the design abstraction level and allows rapid generation of optimized RTL hardware for performance, area, and power requirements. This article gives an overview of state-of-the-art HLS techniques and tools.
  • Keywords
    high level synthesis; HLS techniques; abstraction level design; high-level synthesis; optimized RTL hardware; Application software; Assembly; Circuit simulation; Circuit synthesis; Computer architecture; Design methodology; Design optimization; Hardware design languages; High level synthesis; Space exploration; RTL abstraction; architectures; custom processors; design and test; hardware synthesis and verification; high-level synthesis;
  • fLanguage
    English
  • Journal_Title
    Design & Test of Computers, IEEE
  • Publisher
    ieee
  • ISSN
    0740-7475
  • Type

    jour

  • DOI
    10.1109/MDT.2009.69
  • Filename
    5209958
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1303716