Title :
Inductorless Wideband CMOS Low-Noise Amplifiers Using Noise-Canceling Technique
Author :
Chen, Ke-Hou ; Liu, Shen-Iuan
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
Two inductorless wideband low-noise amplifiers (LNAs) fabricated in a 65-nm CMOS process are presented. By using the gain-enhanced noise-canceling technique, the gain at noise-cancelling condition is increased, while the input matching is maintained. The first work is a common-source LNA with resistive shunt feedback. It achieves a maximum power gain of 10.5 dB, a bandwidth of 10 GHz, a noise figure (NF) of 2.7-3.3 dB, and an IIP3 of -3.5 dBm. The power consumption is 13.7 mW from a 1-V supply, and the area is 0.02 mm 2. The second work is a common-gate LNA. It achieves a maximum power gain of 10.7 dB, a bandwidth of 5.2 GHz, a NF of 2.9-5.4 dB, and an IIP3 of -6 dBm. The power consumption is 7 mW from a 1-V supply, and the area is 0.03 mm 2. Experimental results demonstrate that the first LNA shows the largest bandwidth, and the second LNA has the lowest power consumption among the inductorless wideband LNAs.
Keywords :
CMOS analogue integrated circuits; low noise amplifiers; wideband amplifiers; bandwidth 5.2 GHz to 10 GHz; common-source LNA with resistive shunt feedback; gain-enhanced noise-canceling technique; inductorless wideband CMOS low-noise amplifier; input matching; noise figure 2.7 dB to 5.4 dB; noise-cancelling condition; power 13.7 mW; size 65 nm; voltage 1 V; Gain; Impedance matching; Noise; Noise measurement; Power demand; Wideband; CMOS; gain-enhanced; inductorless; low-noise amplifier (LNA); noise-canceling technique; wideband;
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
DOI :
10.1109/TCSI.2011.2162461