Title :
Overshoot-controlled RLC interconnections
Author_Institution :
Dept. of Electr. & Comput. Eng., Arizona Univ., Tucson, AZ, USA
fDate :
1/1/1991 12:00:00 AM
Abstract :
How overshoot in the step response of a circuit involving an RLC line can be controlled using a combination of driver and line resistance that depends on the load capacitance is shown. The no-peak condition or its equivalent is used to relate line parameters to the driver and load impedances. This no-peak condition generalizes the impedance matching customarily used for lossless lines, i.e. it provides an alternative to the traditional choice RD=√ L/C. The results allow improved circuit response without risk of overshoot, for example, by reduction of driver resistance below √L/C for cases where line resistance is unavoidable and/or where load capacitance is not negligible compared to line capacitance. The algebraic formulas derived are more effective than case-by-case numerical simulations for analyzing scaling and technology issues, whether on-chip, or at the packaging, board, or system levels
Keywords :
delays; impedance matching; integrated circuit technology; step response; transfer functions; RLC interconnections; RLC line; delay; driver resistance; impedance matching; line resistance; load capacitance; no-peak condition; numerical simulations; overshoot; scaling; step response; transfer function; Capacitance; Delay effects; Driver circuits; Impedance; Inductance; Integrated circuit interconnections; Optical wavelength conversion; Propagation delay; RLC circuits; Reflection;
Journal_Title :
Electron Devices, IEEE Transactions on