• DocumentCode
    1304755
  • Title

    Characterization and implementation of self-aligned TiSi2 in submicrometer CMOS technology

  • Author

    Parekh, Nitin S. ; Roede, Henk ; Bos, A.A. ; Jonkers, A.G.M. ; Verhaar, Robert D J

  • Author_Institution
    Philips Res. Lab., Eindhoven, Netherlands
  • Volume
    38
  • Issue
    1
  • fYear
    1991
  • fDate
    1/1/1991 12:00:00 AM
  • Firstpage
    88
  • Lastpage
    94
  • Abstract
    Characterization and process implementation of a self-aligned TiSi 2 in a submicrometer CMOS process are presented. The effects of different in situ sputter etch configurations prior to Ti deposition on silicidation is discussed. It is shown that bridging is not only first RTP time- and temperature-dependent, but also dependent on the Ti(N) overetch time. The C49 to C54-TiSi2 phase transformation is found to be dependent on both the C49-TiSi2 film thickness and the linewidth. A potential degradation phenomenon with high-temperature back-end processing is discussed, and the impact of TiSi2 on specific contact resistance and circuit performance is presented. Thin film analysis was done by Auger electron spectrometry, Rutherford backscattering spectrometry with 2-MeV He+ , transmission electron microscopy, secondary ion mass spectrometry, X-ray diffraction, and X-ray fluorescence spectrometry. Sheet resistance measurements were carried out with a four-point probe
  • Keywords
    CMOS integrated circuits; contact resistance; integrated circuit technology; metallisation; titanium compounds; Auger electron spectrometry; C49 to C54 phase transformation; C49-TiSi2; C54-TiSi2; Rutherford backscattering spectrometry; Ti; Ti salicide; X-ray diffraction; X-ray fluorescence spectrometry; bridging; circuit performance; degradation phenomenon; four-point probe; high-temperature back-end processing; in situ sputter etch configurations; secondary ion mass spectrometry; self aligned TiSi2; sheet resistance; silicidation; specific contact resistance; submicrometer CMOS technology; transmission electron microscopy; Backscatter; CMOS process; Circuit optimization; Contact resistance; Degradation; Electrons; Mass spectroscopy; Silicidation; Sputter etching; Thin film circuits;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.65740
  • Filename
    65740