DocumentCode
1304848
Title
Analog dynamic random-access memory (ADRAM) unit cell implemented using a CCD with feedback
Author
Pain, B. ; Fossum, Eric R.
Author_Institution
Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
Volume
38
Issue
1
fYear
1991
fDate
1/1/1991 12:00:00 AM
Firstpage
178
Lastpage
179
Abstract
A novel unit cell for analog, dynamic, random-access memory is described. The unit cell is implemented using a charge-coupled device (CCD) and features voltage-in/voltage-out operation with low power. The unit cell is essentially an algorithmic voltage sample-and-hold (S/H) circuit. It is sufficiently compact for imager frame memory application and may also find application in analog neural network circuits
Keywords
DRAM chips; analogue circuits; charge-coupled device circuits; feedback; sample and hold circuits; CCD; algorithmic voltage sample-and-hole circuit; analog neural network circuits; analogue DRAM unit cell; charge-coupled device; feedback; imager frame memory; voltage-in/voltage-out operation; Charge coupled devices; Feedback; Large scale integration; Low voltage; Neural networks; Operational amplifiers; Pain; Switched capacitor circuits; Switches; Switching circuits;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/16.65752
Filename
65752
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