Title :
Stress-induced leakage current of tunnel oxide derived from flash memory read-disturb characteristics
Author :
Satoh, Shinji ; Hemink, Gertjan ; Hatakeyama, Kazuo ; Aritome, Seiichi
Author_Institution :
Microelectron. Eng. Lab., Toshiba Corp., Yokohama, Japan
fDate :
2/1/1998 12:00:00 AM
Abstract :
This paper describes the characteristics of the stress-induced leakage current of tunnel oxide derived from flash memory read-disturb characteristics. The following three items were newly observed. First, the threshold voltage shift (ΔVth) of the memory cell under the gate bias condition (read disturb condition) consists of two regions, a decay region and a steady-state region. The decay region is due to both the initial trapping or detrapping of the carriers in the tunnel oxide and the decay of the stress-induced leakage current of the tunnel oxide. The steady-state region is determined by the saturation of the stress-induced leakage current of the tunnel oxide. Second, the read disturb life time is mainly determined by the steady-state region for the oxide thickness of 5.7-10.6 nm investigated here. Third, a high-temperature (125°C) write/erase operation degrades the steady-state region characteristics in comparison with room temperature (30°C) operation. Therefore, accelerated write/erase tests can be carried out at higher operation temperatures
Keywords :
EPROM; MOS memory circuits; cellular arrays; integrated circuit reliability; integrated circuit testing; internal stresses; leakage currents; 125 degC; 5.7 to 10.6 nm; carrier detrapping; carrier trapping; decay region; flash memory read-disturb characteristics; gate bias condition; high-temperature write/erase operation; memory cell; oxide thickness; steady-state region; stress-induced leakage current; threshold voltage shift; tunnel oxide; Capacitors; Degradation; Flash memory; Flash memory cells; Leakage current; Saturation magnetization; Steady-state; Stress; Temperature; Testing;
Journal_Title :
Electron Devices, IEEE Transactions on