Title :
Single sided switching networks
Author :
Gordon, Josh ; Srikanthan, S.
Author_Institution :
Div. of Electr. Eng., Hatfield Polytech., UK
Abstract :
A novel and simple architecture for realising single-sided, rearrangeably-nonblocking, N-port switching networks (N is a power of 2), that uses N/2 log (N/2) elements, together with an efficient routing algorithm with time complexity O(N log (N)) is presented. The networks also exhibit a useful measure of fault tolerance.
Keywords :
circuit layout; multiport networks; switching networks; N-port switching networks; efficient routing algorithm; fault tolerance; matrix switches; single sided switching networks; time complexity;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19900166
