DocumentCode :
1306563
Title :
Zone-melting-recrystallization silicon-on-insulator technology
Author :
Tsaur, Bor-Yeu
Author_Institution :
Lincoln Lab., MIT, Cambridge, MA, USA
Volume :
3
Issue :
4
fYear :
1987
fDate :
7/1/1987 12:00:00 AM
Firstpage :
12
Lastpage :
16
Abstract :
Continuing reduction in feature size and increase in the number of components per chip have been basic trends in the evolution of Si integrated circuits (ICs). The minimum feature size in commercial VLSI chips is currently about 1 μm, and the number of components per chip is about one million. The years approaching 1990 will see the introduction of submicrometer feature sizes and multimillion-com-ponent chips. As device dimensions and device separations shrink below 1 μm, a new device isolation technique will be required to prevent parasitic coupling between adjacent devices through the Si substrate.
fLanguage :
English
Journal_Title :
Circuits and Devices Magazine, IEEE
Publisher :
ieee
ISSN :
8755-3996
Type :
jour
DOI :
10.1109/MCD.1987.6323127
Filename :
6323127
Link To Document :
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