• DocumentCode
    1307402
  • Title

    Hardware-software co-implementation of a H.263 video codec

  • Author

    Jang, S.K. ; Kim, S.-D. ; Lee, J. ; Choi, G.Y. ; Ra, J.B.

  • Author_Institution
    Dept. of Electr. Eng., Korea Adv. Inst. of Sci. & Technol., Seoul, South Korea
  • Volume
    46
  • Issue
    1
  • fYear
    2000
  • fDate
    2/1/2000 12:00:00 AM
  • Firstpage
    191
  • Lastpage
    200
  • Abstract
    An H.263 video codec is implemented by adopting the concept of hardware and software co-design. Each module of the codec is investigated to find which approach between hardware and software is better to achieve real-time processing speed as well as flexibility. The hardware portion includes motion-related engines, such as motion estimation and compensation, and a memory control part. The remaining portion of the H.263 video codec is implemented in software using a RISC processor. This paper also introduces efficient design methods for hardware and software modules. In hardware, an area-efficient architecture for the motion estimator of a multi-resolution block matching algorithm using multiple candidates and spatial correlation in motion vector fields (MRMCS), is suggested to reduce the chip size. Software optimization techniques are also explored by using the statistics of transformed coefficients and the minimum sum of absolute difference (SAD) obtained from the motion estimator
  • Keywords
    code standards; discrete cosine transforms; hardware-software codesign; motion compensation; motion estimation; reduced instruction set computing; telecommunication standards; transform coding; video codecs; video coding; DCT; H.263 video codec; IDCT; RISC processor; area-efficient architecture; chip size reduction; efficient design methods; hardware module; hardware-software co-implementation; memory control; minimum sum of absolute difference; motion compensation; motion estimation; motion vector fields; motion-related engines; multi-resolution block matching algorithm; multiple candidates; real-time processing speed; software module; software optimization; spatial correlation; transformed coefficient statistics; Application software; Circuits; Engines; Random access memory; Reduced instruction set computing; SDRAM; Statistics; Video codecs;
  • fLanguage
    English
  • Journal_Title
    Consumer Electronics, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0098-3063
  • Type

    jour

  • DOI
    10.1109/30.826398
  • Filename
    826398