• DocumentCode
    1307642
  • Title

    TRaX: A Multicore Hardware Architecture for Real-Time Ray Tracing

  • Author

    Spjut, Josef ; Kensler, Andrew ; Kopta, Daniel ; Brunvand, Erik

  • Author_Institution
    Sch. of Comput., Univ. of Utah, Salt Lake City, UT, USA
  • Volume
    28
  • Issue
    12
  • fYear
    2009
  • Firstpage
    1802
  • Lastpage
    1815
  • Abstract
    Threaded Ray eXecution (TRaX) is a highly parallel multithreaded multicore processor architecture designed for real-time ray tracing. The TRaX architecture consists of a set of thread processors that include commonly used functional units (FUs) for each thread and that share larger FUs through a programmable interconnect. The memory system takes advantage of the application´s read-only access to the scene database and write-only access to the frame buffer output to provide efficient data delivery with a relatively simple memory system. One specific motivation behind TRaX is to accelerate single-ray performance instead of relying on ray packets in single-instruction-multiple-data mode to boost throughput, which can fail as packets become incoherent with respect to the objects in the scene database. In this paper, we describe the TRaX architecture and our performance results compared to other architectures used for ray tracing. Simulated results indicate that a multicore version of the TRaX architecture running at a modest speed of 500 MHz provides real-time ray-traced images for scenes of a complexity found in video games. We also measure performance as secondary rays become less coherent and find that TRaX exhibits only minor slowdown in this case while packet-based ray tracers show more significant slowdown.
  • Keywords
    computer architecture; coprocessors; multi-threading; ray tracing; TRaX architecture; data delivery efficiency; frame buffer output; functional unit; multicore hardware architecture; parallel multithreaded multicore processor architecture; real-time ray tracing; scene database; simple memory system; single instruction multiple data mode; single ray performance acceleration; threaded ray execution; Acceleration; Databases; Hardware; Layout; Multicore processing; Process design; Ray tracing; Read-write memory; Throughput; Computer architecture; computer graphics; ray tracing;
  • fLanguage
    English
  • Journal_Title
    Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0278-0070
  • Type

    jour

  • DOI
    10.1109/TCAD.2009.2028981
  • Filename
    5324031