DocumentCode :
1307719
Title :
Power-Supply Noise Reduction Using Active Inductors in Mixed-Signal Systems
Author :
Taparia, Ajay ; Banerjee, Bhaskar ; Viswanathan, T.R.
Author_Institution :
Maxim Integrated Products, Sunnyvale, CA, USA
Volume :
19
Issue :
11
fYear :
2011
Firstpage :
1960
Lastpage :
1968
Abstract :
Power-supply noise is a significant problem in mixed-signal systems on a chip. This is due to the impulse like current drawn by digital CMOS gates which couples to the sensitive analog circuits through supplies and the substrate. A noise-localization technique using on-chip active inductors is proposed. This would make the noise current generated by the digital gates to remain local in the region of the digital gates. This active inductor is designed to have minimum overhead in terms of voltage headroom and area. Simulations of benchmark digital gates, frequency dividers, and buffers demonstrate about 30-dB reduction of noise with this technique. Measured results from a test-chip carrying this design further demonstrate the functionality of this inductor.
Keywords :
CMOS digital integrated circuits; frequency dividers; inductors; integrated circuit noise; mixed analogue-digital integrated circuits; power supplies to apparatus; active inductors; benchmark digital gates; digital CMOS gates; digital gates; frequency dividers; mixed-signal systems; noise-localization; on-chip active inductors; power-supply noise reduction; sensitive analog circuits; Active inductors; Capacitors; Inductance; Logic gates; Noise; Resonant frequency; Active inductors; CMOS inductance circuit; decoupling; gyrator; inductor simulation; inductors; mixed-signal system-on-a-chip (SoC); power supply noise;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2010.2063043
Filename :
5559498
Link To Document :
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