DocumentCode :
1307805
Title :
Hardness assurance testing of bipolar junction transistors at elevated irradiation temperatures
Author :
Witczak, S.C. ; Schrimp, R.D. ; Fleetwood, D.M. ; Galloway, K.F. ; Lacoe, R.C. ; Mayer, D.C. ; Puhl, J.M. ; Pease, R.L. ; Suehle, J.S.
Author_Institution :
Electron. Technol. Centre, Aerosp. Corp., Los Angeles, CA, USA
Volume :
44
Issue :
6
fYear :
1997
fDate :
12/1/1997 12:00:00 AM
Firstpage :
1989
Lastpage :
2000
Abstract :
The effect of dose rate on radiation-induced current gain degradation was quantified for radiation-hardened poly-Si emitter n-p-n bipolar transistors over the range of 0.005 to 294 rad(Si)/s. Degradation increases sharply with decreasing dose rate and saturates near 0.005 rad(Si)/s. The amount of degradation enhancement at low dose rates decreases monotonically with total dose. In addition, the effect of ambient temperature on radiation-induced gain degradation at 294 rad(Si)/s was investigated over the range of 25 to 240°C. Degradation is enhanced with increasing temperature while simultaneously being moderated by in situ annealing, such that, for a given total dose, an optimum irradiation temperature for maximum degradation results. The optimum irradiation temperature decreases logarithmically with total dose and, for a given dose, is smaller than optimum temperatures reported previously for p-n-p devices. High dose rate irradiation at elevated temperatures is less effective at simulating low dose rate degradation for the n-p-n transistor than for the p-n-p transistors. However, additional degradation of the n-p-n device at elevated temperatures is easily obtained using overtest. Differences in the radiation responses of the device types are attributed to the relative effects of oxide trapped charge on gain degradation. High dose rate irradiation near 125°C is found to be suitable for the hardness assurance testing of these devices provided a design margin of at least two is employed
Keywords :
annealing; bipolar transistors; elemental semiconductors; radiation hardening (electronics); semiconductor device testing; silicon; 25 to 240 C; Si; ambient temperature; bipolar junction transistors; elevated irradiation temperatures; high dose rate irradiation; in situ annealing; n-p-n transistor; optimum irradiation temperature; oxide trapped charge; poly-Si emitter bipolar transistors; polysilicon emitter; radiation hardness assurance testing; radiation responses; radiation-hardened bipolar transistors; radiation-induced current gain degradation; Annealing; Bipolar transistors; Circuit testing; Degradation; Metastasis; NIST; Space charge; Space technology; Temperature distribution; Temperature measurement;
fLanguage :
English
Journal_Title :
Nuclear Science, IEEE Transactions on
Publisher :
ieee
ISSN :
0018-9499
Type :
jour
DOI :
10.1109/23.658978
Filename :
658978
Link To Document :
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