DocumentCode
1307943
Title
Address-Independent Estimation of the Worst-Case Memory Performance
Author
Fraguela, Basilio B. ; Andrade, Diego ; Doallo, Ramón
Author_Institution
Comput. Archit. Group, Univ. of A Coruna, A Coruña, Spain
Volume
6
Issue
4
fYear
2010
Firstpage
664
Lastpage
677
Abstract
Real-time systems are subject to temporal constraints and require a schedulability analysis to ensure that task execution finishes within lower and upper specified bounds. Worst-case memory performance (WCMP) plays a key role in the calculation of the upper bound of the execution time. Data caches complicate the calculation of the WCMP, since their behavior is highly dependent on the sequence of memory addresses accessed, which is often not available. For example, the address of a data structure may not be available at compile-time, and it may change between different executions of the program. We present an analytical model that provides fast, safe and tight estimations of the WCMP component of the worst-case execution time, using no information about the data base addresses. The address-independent absolute WCMP for codes with references that follow the same access pattern can be very high with respect to the average behavior because those references may be aligned with respect to the cache, thus generating systematic interferences among them. Our model can also provide a tighter and safe estimation for the WCMP for these codes when the user avoids these alignments.
Keywords
cache storage; real-time systems; scheduling; address-independent estimation; analytical model; data caches; real-time systems; schedulability analysis; worst-case execution time; worst-case memory performance; Cache memory; Estimation; Mathematical model; Performance analysis; Real time systems; Upper bound; Cache memories; performance analysis and design aids; worst-case analysis;
fLanguage
English
Journal_Title
Industrial Informatics, IEEE Transactions on
Publisher
ieee
ISSN
1551-3203
Type
jour
DOI
10.1109/TII.2010.2064172
Filename
5559537
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