• DocumentCode
    1308387
  • Title

    Burn-in economics model for multi-chip modules

  • Author

    Alani, A. ; Dislis, C. ; Jalowiecki, I.

  • Author_Institution
    LSI Logic Eur., Bracknell, UK
  • Volume
    32
  • Issue
    25
  • fYear
    1996
  • fDate
    12/5/1996 12:00:00 AM
  • Firstpage
    2349
  • Lastpage
    2351
  • Abstract
    Burn-in is an essential part of semiconductor product screening to significantly reduce or eliminate defective parts, hence improving product reliability. However, the cost implications of burn-in on some products may be prohibitively expensive. The economics model of burn-in presented here helps predict the cost and quality implications of this process for multi-chip modules
  • Keywords
    economics; integrated circuit reliability; integrated circuit testing; multichip modules; burn-in economics model; cost; multi-chip module; quality; reliability; semiconductor product screening;
  • fLanguage
    English
  • Journal_Title
    Electronics Letters
  • Publisher
    iet
  • ISSN
    0013-5194
  • Type

    jour

  • DOI
    10.1049/el:19961559
  • Filename
    555972