Title :
The Dawn of Predictive Chip Yield Design: Along and Beyond the Memory Lane
Author :
Joshi, Rajiv ; Pelella, Antonio R. ; Tuminaro, Arthur ; Chan, Yuen ; Kanj, Rouwaida
Author_Institution :
IBM T.J. Watson Lab., Yorktown Heights, NY, USA
Abstract :
Statistical approaches for yield estimation and robust design are vital in the current variation-dominated design era. This article presents a mixture importance sampling methodology to enable yield-driven design and extends its application beyond memories to peripheral circuits and logic blocks.
Keywords :
integrated circuit design; sampling methods; current variation dominated design; logic block; memory lane; peripheral circuit; predictive chip yield design; robust design; sampling methodology; statistical approach; yield estimation; yield-driven design; Decoding; Delay; Logic design; Memory; Monte Carlo methods; Noise; Random access memory; DFM; design and test; logic; memory; test; variation-tolerant designs; yield;
Journal_Title :
Design & Test of Computers, IEEE
DOI :
10.1109/MDT.2010.95
