Title :
High speed GaAs 32*8 embeddable dual port SRAM register array for 200 Mbyte/s packet switching applications
Author_Institution :
Bell Northern Res., Ottawa, Ont., Canada
fDate :
4/14/1990 12:00:00 AM
Abstract :
A 3 ns, 130 mW, 32*8 dual port SRAM register array targetted for embedded use as the data frame storage unit of a time division multiplexed switch chip has been successfully fabricated in a GaAs E/D MESFET process. It represents the first known report of a circuit with simultaneous read/write capability in this technology.
Keywords :
III-V semiconductors; Schottky gate field effect transistors; buffer storage; field effect integrated circuits; gallium arsenide; integrated circuit technology; integrated memory circuits; packet switching; random-access storage; time division multiplexing; 130 mW; 200 Mbyte/s; 256 bit; 3 ns; 32 bytes; E/D MESFET process; GaAs; TDM; data frame storage unit; dual port SRAM register array; semiconductors; simultaneous read/write capability; time division multiplexed switch chip;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19900336
