DocumentCode
1311105
Title
Variation Study of the Planar Ground-Plane Bulk MOSFET, SOI FinFET, and Trigate Bulk MOSFET Designs
Author
Xin Sun ; Moroz, Victor ; Damrongplasit, Nattapol ; Changhwan Shin ; Tsu-Jae King Liu
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Univ. of California, Berkeley, CA, USA
Volume
58
Issue
10
fYear
2011
Firstpage
3294
Lastpage
3299
Abstract
The impact of systematic and random variations on transistor performance is investigated for the trigate bulk MOSFET, the planar ground-plane bulk MOSFET, and SOI FinFET. The results indicate that the trigate bulk MOSFET design is least sensitive to process-induced variations and offers the best nominal performance, as compared with the planar ground-plane bulk MOSFET and SOI FinFET.
Keywords
MOSFET; silicon-on-insulator; SOI FinFET; planar ground-plane bulk MOSFET; process-induced variations; trigate bulk MOSFET; variation study; FinFETs; Logic gates; MOSFET circuits; Resource description framework; Stress; Systematics; Fin-shaped FET; metal–oxide–semiconductor field-effect transistor (MOSFET); multigate FET; variability;
fLanguage
English
Journal_Title
Electron Devices, IEEE Transactions on
Publisher
ieee
ISSN
0018-9383
Type
jour
DOI
10.1109/TED.2011.2161479
Filename
6006523
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