An ASIC for the Study of Charge Sharing Effects in Small Pixel CdZnTe X-Ray Detectors

An Application Specific Integrated Circuit (ASIC) has been developed at the Rutherford Appleton Laboratory (RAL) to study the small pixel effect in spectroscopic CdTe and CdZnTe detectors. The PIXIE ASIC consists of four arrays of 3 × 3 channels flip chip bonded directly to the detector pixels. The active circuitry of each channel is a charge sensitive preamplifier and an output buffer which is multiplexed directly off chip. Each of the four detector arrays has a different anode geometry. The HEXITEC series of small pixel detectors developed at RAL have demonstrated energy resolutions of ~1 keV per pixel for both CdTe and CdZnTe, however, charge sharing events account for between 30-40% of the total count rate and can lead to degradation of the spectroscopy if not corrected for. The PIXIE ASIC will be used to study the effect of anode geometry on charge sharing and other aspects of the small pixel effect.