Title :
Roundoff noise reduction in cascade realizations of FIR digital filters
Author :
Smith, L. Montgomery ; Henderson, M. Eugene, Jr.
Author_Institution :
Dept. of Electr. Eng., Tennessee Univ. Space Inst., Tullahoma, TN, USA
fDate :
4/1/2000 12:00:00 AM
Abstract :
This correspondence presents the results of a numerical analysis of roundoff noise effects in cascade realizations or FIR filters. Minimum-noise realizations were designed through an exhaustive search over all possible subfilter orderings, although it was found that computation time was impractical for filters with more than approximately ten subfilters. The hypothesis that arranging filters in order of decreasing bandwidth reduces roundoff noise was tested and found to be ineffective for FIR filters. Simulated annealing was tested and found to be an effective technique for reducing roundoff noise in cascade connection realizations of FIR digital filters. The simulated annealing algorithm was adapted to this problem and was found to yield subfilter orderings with roundoff noise gain very near the minimum achievable. Results are presented that illustrate these findings
Keywords :
FIR filters; cascade networks; circuit noise; digital filters; filtering theory; numerical analysis; roundoff errors; simulated annealing; FIR digital filters; cascade realizations; exhaustive search; minimum-noise realizations; numerical analysis; roundoff noise reduction; simulated annealing; subfilter orderings; Bandwidth; Digital filters; Finite impulse response filter; Finite wordlength effects; Guidelines; IIR filters; Noise reduction; Programmable logic arrays; Simulated annealing; Testing;
Journal_Title :
Signal Processing, IEEE Transactions on