DocumentCode
1312063
Title
A Low Overhead High Test Compression Technique Using Pattern Clustering With $n$-Detection Test Support
Author
Wang, Seongmoon ; Wei, Wenlong ; Wang, Zhanglei
Author_Institution
NEC Labs. America, Princeton, NJ, USA
Volume
18
Issue
12
fYear
2010
fDate
12/1/2010 12:00:00 AM
Firstpage
1672
Lastpage
1685
Abstract
This paper presents a test data compression scheme that can be used to further improve compressions achieved by linear-feedback shift register (LFSR) reseeding. The proposed compression technique can be implemented with very low hardware overhead. The test data to be stored in the automatic test equipment (ATE) memory are much smaller than that for previously published schemes, and the number of test patterns that need to be generated is smaller than other weighted random pattern testing schemes. The proposed technique can be extended to generate test patterns that achieve high n-detection fault coverage. This technique compresses a regular 1-detection test cube set instead of an n-detection test cube set, which is typically n times larger. Hence, the volume of compressed test data for n-detection test is comparable to that for 1-detection test. Experimental results on a large industry design show that over 1600X compression is achievable by the proposed scheme with the test sequence length, which is comparable to that of highly compacted deterministic patterns. Experimental results on n -detection test show that test patterns generated by the proposed decompressor can achieve very high 5-detection stuck-at fault coverage and high compression for large benchmark circuits.
Keywords
automatic test equipment; data compression; pattern clustering; ATE memory; automatic test equipment; compression technique; highly compacted deterministic patterns; linear-feedback shift register reseeding; low overhead high test compression; n-detection test cube set; n-detection test support; pattern clustering; regular 1-detection test cube set; test data compression; very high 5-detection stuck-at fault coverage; weighted random pattern testing; Automatic test equipment; Automatic testing; Circuit faults; Circuit testing; Hardware; Image coding; Pattern clustering; Shift registers; Test data compression; Test pattern generators; $n$-detection testing; Linear-feedback shift register (LFSR) reseeding; linear decompression; test data compression;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2009.2026420
Filename
5325882
Link To Document