DocumentCode :
1312409
Title :
Dynamic NBTI Management Using a 45 nm Multi-Degradation Sensor
Author :
Singh, Prashant ; Karl, Eric ; Sylvester, Dennis ; Blaauw, David
Author_Institution :
Nvidia, Santa Clara, CA, USA
Volume :
58
Issue :
9
fYear :
2011
Firstpage :
2026
Lastpage :
2037
Abstract :
This paper proposes a low power unified oxide and negative bias temperature instability (NBTI) degradation sensor designed in 45 nm process node. The cell power consumption is 105 lower than a previously proposed sensor. The unified nature enables efficient reliability monitoring with reduced sensor deployment effort and area overhead. Using the sensor dynamic NBTI management (DNM) has been implemented for the first time. DNM trades the excess “reliability margin” present in the design, due to better than worst case operating conditions, with performance. For the typical case shown in this paper, DNM allows for an average boost of 90 mV in accelerated supply voltage while bringing down the excess NBTI margin of 22.5 mV to 8 mV where the total budget for NBTI was 66 mV.
Keywords :
CMOS integrated circuits; MOSFET; low-power electronics; semiconductor device reliability; sensor placement; cell power consumption; dynamic NBTI management; low power unified oxide; multidegradation sensor; negative bias temperature instability degradation sensor; reliability margin; reliability monitoring; sensor deployment effort; size 45 nm; voltage 90 mV; Degradation; Electric breakdown; Leakage current; Logic gates; Reliability; Stress; Stress measurement; Degradation; gate-oxide wear-out; negative bias temperature instability (NBTI); reliability; sensor;
fLanguage :
English
Journal_Title :
Circuits and Systems I: Regular Papers, IEEE Transactions on
Publisher :
ieee
ISSN :
1549-8328
Type :
jour
DOI :
10.1109/TCSI.2011.2163894
Filename :
6007064
Link To Document :
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