Title :
Beyond Amdahl´s Law: An Objective Function That Links Multiprocessor Performance Gains to Delay and Energy
Author :
Cassidy, Andrew S. ; Andreou, Andreas G.
Author_Institution :
Dept. of Electr. & Comput. Eng., Johns Hopkins Univ., Baltimore, MD, USA
Abstract :
Beginning with Amdahl´s law, we derive a general objective function that links parallel processing performance gains at the system level, to energy and delay in the subsystem microarchitecture structures. The objective function employs parameterized models of computation and communication to represent the characteristics of processors, memories, and communications networks. The interaction of the latter microarchitectural elements defines global system performance in terms of energy-delay cost. Following the derivation, we demonstrate its utility by applying it to the problem of Chip Multiprocessor (CMP) architecture exploration. Given a set of application and architectural parameters, we solve for the optimal CMP architecture for six different architectural optimization examples. We find the parameters that minimize the total system cost, defined by the objective function under the area constraint of a single die. The analytical formulation presented in this paper is general and offers the foundation for the quantitative and rapid evaluation of computer architectures under different constraints including that of single die area.
Keywords :
microprocessor chips; parallel processing; Amdahl law; architectural optimization; architectural parameters; chip multiprocessor architecture exploration; communications networks; computer architectures; energy-delay cost; general objective function; global system performance; memories; microarchitectural elements; optimal CMP architecture; parallel processing performance; single die area; subsystem microarchitecture structures; system level; Algorithm design and analysis; Computer architecture; Delay; Hidden Markov models; Optimization; Parallel processing; Program processors; Modeling; and optimization of multiprocessor systems; chip-multiprocessor architecture.; design exploration; evaluation;
Journal_Title :
Computers, IEEE Transactions on
DOI :
10.1109/TC.2011.169