Array based design of digital filters

It is noted that signal processing designs for real-time large-scale systems are increasingly confronted with two conflicting objectives. The traditional objective of optimal design in low signal-to-noise ratio environments is confronted with the need for simplicity in implementation and speed of computation. The inclusion of high throughput and efficient hardware utilization as constraints on digital filter designs is considered. In particular, implementation of the design via an array processor is introduced. The concept of fast processing becomes synonymous with high throughout and efficient implementation on such a device. Using an array interpretation of the FFT structure, the retention of this highly efficient structure in a general design setting is demonstrated. For a typical signal extraction design, a constrained least-squares minimization is introduced to determine optimal enhancing filters with highly efficient array implementation