FPGA implementation of voice activity detector for efficient speech enhancement

Author

Oukherfellah, Mourad ; Bahoura, Mohammed

Author_Institution

Dept. of Eng., Univ. du Quebec a Rimouski, Rimouski, QC, Canada

fYear

2014

fDate

22-25 June 2014

Firstpage

301

Lastpage

304

Abstract

In this paper, a spectral subtraction method including voice activity detector (VAD), based on short-time energy, is implemented on FPGA for efficient speech enhancement. The proposed architecture is implemented using Xilinx System Generator for DSP and Digilent Nexys-4 board based on Artix-7 FPGA. Performances obtained by spectral subtraction with VAD are compared to those obtained by the one without VAD, using amplitude-modulated additive noise. Required resources and maximum operating frequency are also presented.

Keywords

field programmable gate arrays; speech enhancement; speech recognition; Artix-7 FPGA; DSP; Digilent Nexys-4 board; VAD; Xilinx system generator short-time energy; efficient speech enhancement; spectral subtraction method; speech recognition; voice activity detector FPGA implementation; Computer architecture; Field programmable gate arrays; Frequency-domain analysis; Hardware; Noise; Speech; Speech enhancement;

fLanguage

English

Publisher

ieee

Conference_Titel

New Circuits and Systems Conference (NEWCAS), 2014 IEEE 12th International

Conference_Location

Trois-Rivieres, QC

Type

conf

DOI

10.1109/NEWCAS.2014.6934042

Filename

6934042

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=131329