DocumentCode
131333
Title
An efficient real-time FPGA implementation for object detection
Author
Jin Zhao ; Xinming Huang ; Massoud, Yehia
Author_Institution
Dept. of Electr. & Comput. Eng., Worcester Polytech. Inst., Worcester, MA, USA
fYear
2014
fDate
22-25 June 2014
Firstpage
313
Lastpage
316
Abstract
In this paper, we present an efficient real-time FPGA implementation for object detection. The system employs Speeded Up Robust Features (SURF) algorithm to detect keypoints on every video frame and applies Fast Retina Keypoint (FREAK) method to describe the keypoints. One-to-one feature matching is performed between the descriptors of objects in the library and the descriptors of the video frames, to ensure a high object detection accuracy. Our experiments demonstrate that our FPGA-based design is fully functional and it can process video frames with 800×600 resolution at 60 fps. The proposed FPGA design is 23 times faster than the same algorithm implemented on Intel Core i5-3210M CPU.
Keywords
feature extraction; field programmable gate arrays; image matching; image resolution; object detection; video signal processing; FREAK method; Intel Core i5-3210M CPU; Object Detection; SURF algorithm; Speeded Up Robust Features algorithm; fast retina keypoint method; feature matching; real-time FPGA implementation; video frame; Detectors; Feature extraction; Field programmable gate arrays; Libraries; Object detection; Real-time systems; Streaming media; FPGA; Object detection; Real-time implementation;
fLanguage
English
Publisher
ieee
Conference_Titel
New Circuits and Systems Conference (NEWCAS), 2014 IEEE 12th International
Conference_Location
Trois-Rivieres, QC
Type
conf
DOI
10.1109/NEWCAS.2014.6934045
Filename
6934045
Link To Document