DocumentCode :
13137
Title :
C-Based Complex Event Processing on Reconfigurable Hardware
Author :
Inoue, H. ; Takenaka, Takashi ; Motomura, Masato
Author_Institution :
Syst. IP Core Res. Labs., NEC Corp., Kawasaki, Japan
Volume :
21
Issue :
5
fYear :
2013
fDate :
May-13
Firstpage :
971
Lastpage :
974
Abstract :
This brief presents an efficient complex event-processing framework, designed to process a large number of sequential events on field-programmable gate arrays (FPGAs). Unlike conventional structured query language based approaches, our approach features logic automation constructed with a new C-based event language that supports regular expressions on the basis of C functions, so that a wide variety of event-processing applications can be efficiently mapped to FPGAs. Evaluations on an FPGA-based network interface card show that we can achieve 12.3 times better event-processing performance than does a CPU software in a financial trading application.
Keywords :
C language; field programmable gate arrays; formal languages; high level synthesis; logic design; network interfaces; reconfigurable architectures; sequential circuits; C functions; C-based complex event processing; C-based event language; CPU software; FPGA-based network interface card; conventional structured query language; event-processing applications; event-processing performance; field-programmable gate arrays; financial trading application; logic automation; reconfigurable hardware; regular expressions; sequential events; Benchmark testing; Central Processing Unit; Field programmable gate arrays; Hardware; Smoothing methods; Software; Very large scale integration; Circuit synthesis; computer languages; pipeline processing; reconfigurable architectures;
fLanguage :
English
Journal_Title :
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher :
ieee
ISSN :
1063-8210
Type :
jour
DOI :
10.1109/TVLSI.2012.2197230
Filename :
6200885
Link To Document :
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