Image Processing Memory Optimization for Multi-camera Based Advanced Driver Assistance Systems

Advanced Driver Assistance Systems (ADASs) have become a hot research area in intelligent transportation systems which are important for building Wisdom City. The major challenge of ADASs is to meet the real-time image processing requirements, especially when multiple cameras are adopted into ADASs. The image processing algorithms are highly data dominated, which means it is crucial to reduce memory access latency for improving performance of image processing. However, no efficient memory optimization studies have been performed for ADASs yet. In the paper we introduced a new unit, called Image Processing Acceleration Unit (IPAU), for optimizing the memory bandwidth of real-time video processing systems. The first feature of IPAU is block mode data layout in DRAM devices. The second feature is multiscale block mode hardware support through reorder buffer. The last feature is hardware rotation accelerator. Based on evaluation results, memory with IPAU can improve memory bandwidth by 49% compared to a memory hierarchy without IPAU, and reduce the energy consumption by 30% on the average.