Switched-capacitor neural networks using pulse based arithmetic

A possible VLSI implementation of a neural network using SC networks is presented. The frequency of a presynaptic pulse is used as a measure of its state, V_j(f). Synaptic multiplication is made possible by controlling input voltages to the SC multiplier and clock frequencies, V_j(f). Programmable positive and negative weights are allowed. The design is asynchronous and does not require any master clocks.