Title :
Removal of sign-extension circuitry from Booth´s algorithm multiplier-accumulators
Author_Institution :
Dept. of Electr. Eng. & Electron., Brunel Univ., Uxbridge, UK
Abstract :
A technique for converting the partial products in a modified Booth´s algorithm multiplier from two´s complement form to unsigned form, therefore eliminating the need for sign-extension circuitry is described. A proof is provided and an example of a multiply-accumulator given.
Keywords :
VLSI; digital arithmetic; digital signal processing chips; integrated logic circuits; Booth´s algorithm multiplier-accumulators; VLSI multiply-accumulators; partial products; proof; sign extension circuitry elimination; unsigned form;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19900908
