Advances in bipolar VLSI

Author

Wilson, George R.

Author_Institution

Bipolar Integrated Technol. Inc., Beaverton, OR, USA

Volume

Issue

fYear

1990

fDate

11/1/1990 12:00:00 AM

Firstpage

1707

Lastpage

1719

Abstract

Bipolar IC processes are reviewed, and the impact of BiCMOS technology on bipolar VLSI is discussed. The discussion covers standard emitter-coupled-logic (ECL) circuit configuration, on-chip line driving, output circuitry, series gating, ECL versus CML (current-mode logic), differential logic, noise margins, interconnect capacitance, bipolar VLSI transistor design and scaling, and processes for ECL VLSI

Keywords

BIMOS integrated circuits; VLSI; bipolar integrated circuits; emitter-coupled logic; integrated circuit technology; integrated logic circuits; reviews; BiCMOS technology; CML; ECL; IC processes; bipolar VLSI; current-mode logic; differential logic; emitter-coupled-logic; interconnect capacitance; monolithic IC; noise margins; on-chip line driving; output circuitry; scaling; series gating; transistor design; BiCMOS integrated circuits; Bipolar integrated circuits; CMOS logic circuits; CMOS process; CMOS technology; Delay; Digital systems; Out of order; Power dissipation; Very large scale integration;

fLanguage

English

Journal_Title

Proceedings of the IEEE

Publisher

ieee

ISSN

0018-9219

Type

jour

DOI

10.1109/5.63299

Filename

63299

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1316383