• DocumentCode
    1317594
  • Title

    Theoretical study of deep-trap-assisted anomalous currents in worst-bit cells of dynamic random-access memories (DRAM´s)

  • Author

    Yamaguchi, Ken

  • Author_Institution
    Adv. Res. Lab., Hitachi Ltd., Tokyo, Japan
  • Volume
    47
  • Issue
    4
  • fYear
    2000
  • fDate
    4/1/2000 12:00:00 AM
  • Firstpage
    774
  • Lastpage
    780
  • Abstract
    High-level leakage (anomalous) currents in worst-bit cells of dynamic random-access memory (DRAM) devices, i.e., in the tail region of the cumulative probability of the data retention time distribution, are analyzed by utilizing device simulation. Deep-traps are assumed to be located near the metallurgical junction, and the anomalous current is evaluated as a function of the number of traps as well as a function of energy level (Et) and capture cross-section (σ). Calculated leakage currents are compared with measured data. It is found that: (1) acceptor-type deep-traps located in an n-region, as well as donor-type deep-traps in a p-region, can generate the high-level current flowing through pn junctions; (2) heavy-metal contamination of the order of 103 atoms/cell can generate the high-level current when E t is situated near the center in the energy gap and σ is around 10-15 cm2; and (3) current induced by point defects is two to six orders of magnitude lower than that induced by the heavy-metal contamination. Several sets of material constants are examined for obtaining the best fit between the calculated current and measured data. This examination theoretically predicts Zn and Au atoms (of the order of 103 per unit cell) as the origins of the anomalous current in worst-bit cells
  • Keywords
    DRAM chips; circuit simulation; deep levels; electron traps; integrated circuit reliability; leakage currents; point defects; acceptor-type deep-traps; capture cross-section; cumulative probability; data retention time distribution; deep-trap-assisted anomalous currents; device simulation; donor-type deep-traps; dynamic random-access memories; energy level; heavy-metal contamination; high-level current; high-level leakage currents; point defects; tail region; worst-bit cells; Analytical models; Atomic measurements; Contamination; Current measurement; Energy capture; Energy states; Leakage current; Pollution measurement; Probability distribution; Random access memory;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/16.830993
  • Filename
    830993