An architecture for QoS analysis and experimentation

Author

Marcus, William S.

Author_Institution

Bellcore, Morristown, NJ, USA

Volume

4

Issue

4

fYear

1996

fDate

8/1/1996 12:00:00 AM

Firstpage

597

Lastpage

603

Abstract

We have prototyped and have begun to experiment with an extremely flexible ATM cell store. The cell store accommodates 16 K ATM cells and allows complete software control of the buffer management strategy. The prototype was designed to serve as an output port in an experimental ATM switch, but has also been used as a stand-alone component in several research ATM networks. It is envisioned that the cell store will aid in the realization of queueing strategies capable of supporting emerging ATM and IP service models. This paper describes the motivation, background, detailed design, and an application of the ATM cell store

Keywords

asynchronous transfer mode; buffer storage; packet switching; queueing theory; storage management; telecommunication computing; telecommunication congestion control; telecommunication networks; transport protocols; 16 kbit; ATM cell store; ATM service models; IP service models; QoS analysis; QoS experimentation; buffer management; experimental ATM switch; network architecture; output port; packet switched networks; queueing strategies; research ATM networks; software control; Asynchronous transfer mode; Computer architecture; Discussion forums; Hardware; Isolation technology; Packet switching; Prototypes; Software prototyping; Switches; Web and internet services;

fLanguage

English

Journal_Title

Networking, IEEE/ACM Transactions on

Publisher

ieee

ISSN

1063-6692

Type

jour

DOI

10.1109/90.532868

Filename

532868