DocumentCode
1317969
Title
Functional Test-Sequence Grading at Register-Transfer Level
Author
Fang, Hongxia ; Chakrabarty, Krishnendu ; Jas, Abhijit ; Patil, Srinivas ; Tirumurti, Chandra
Author_Institution
Dept. of Electr. & Comput. Eng., Duke Univ., Durham, NC, USA
Volume
20
Issue
10
fYear
2012
Firstpage
1890
Lastpage
1894
Abstract
We propose output deviations as a surrogate metric to grade functional test sequences at the register-transfer level without explicit fault simulation. Experimental results for the open-source Biquad filter core and the Scheduler module of the Illinois Verilog Model show that the deviations metric is computationally efficient and it correlates well with gate-level coverage for stuck-at, transition-delay and bridging faults. Results also show that functional test sequences reordered based on output deviations provide steeper gate-level fault coverage ramp-up compared to other ordering methods.
Keywords
biquadratic filters; fault diagnosis; hardware description languages; Illinois Verilog Model; Scheduler module; functional test-sequence grading; gate-level fault coverage; open-source Biquad filter core; register-transfer level; transition-delay; Clocks; Correlation; Logic gates; Observability; Registers; Defect; functional test; output deviation; register-transfer level (RTL); test grading;
fLanguage
English
Journal_Title
Very Large Scale Integration (VLSI) Systems, IEEE Transactions on
Publisher
ieee
ISSN
1063-8210
Type
jour
DOI
10.1109/TVLSI.2011.2163651
Filename
6016226
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