DocumentCode
1318406
Title
8 Gbit/s CMOS interface for parallel fibre-optic interconnects
Author
Sano, B. ; Madhavan, B. ; Levi, A.F.J.
Author_Institution
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
Volume
32
Issue
24
fYear
1996
fDate
11/21/1996 12:00:00 AM
Firstpage
2262
Lastpage
2263
Abstract
The authors demonstrate an 8 Gbit/s CMOS link interface designed for use with parallel fibre-optic interconnect technology. The link interface is implemented in 0.8 μm CMOS and consists of eight data channels and one frame control channel each operating at 1 Gbit/s along with a full-speed 1 GHz clock channel. The chip also provides dual-ported FIFO buffers for interface to a host computer
Keywords
CMOS digital integrated circuits; network interfaces; optical fibres; optical interconnections; peripheral interfaces; 0.8 micron; 8 Gbit/s; CMOS link interface; clock channel; data channels; dual-ported FIFO buffers; frame control channel; parallel fibre-optic interconnects;
fLanguage
English
Journal_Title
Electronics Letters
Publisher
iet
ISSN
0013-5194
Type
jour
DOI
10.1049/el:19961502
Filename
556804
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