Title :
2-D DCT systolic array implementation
Author_Institution :
Dept. of Radio Eng., South China Univ. of Technol., Guangzhou, China
Abstract :
The algorithm and architecture of a 2-D systolic array processor for the DCT (discrete cosine transform) are proposed. It is based on the relationship between DCT and cosine DFT and sine DFT. Two systolic architectures of 1-D DCT data and control flow computation are discussed. By use of the main feature of the two systolic 1-D arrays for DCT, a full 2-D systolic DCT array is presented.
Keywords :
multiprocessing systems; systolic arrays; transforms; 2-D DCT systolic array implementation; 2-D systolic DCT array; 2-D systolic array processor; cosine DFT; discrete cosine transform; sine DFT; systolic architectures;
Journal_Title :
Electronics Letters
DOI :
10.1049/el:19910130
