• DocumentCode
    1319775
  • Title

    Ultrafine Pitch (6 \\mu\\hbox {m} ) of Recessed and Bonded Cu–Cu Interconnects by Three-Dimensional Wafer Stacking

  • Author

    Peng, Lan ; Zhang, Lin ; Fan, Ji ; Li, Hong Yu ; Lim, Dau Fatt ; Tan, Chuan Seng

  • Author_Institution
    Inst. of Microelectron., Agency for Sci., Technol. & Res., Singapore, Singapore
  • Volume
    33
  • Issue
    12
  • fYear
    2012
  • Firstpage
    1747
  • Lastpage
    1749
  • Abstract
    In this letter, an evolution of high-density (>; 106 cm-2) bonded Cu-Cu interconnects of 6-μm pitch is successfully demonstrated using wafer-on-wafer thermocompression bonding. Cu sealing frame with excellent hermeticity is integrated to the bonded structures to promote bond reliability. Additionally, temporary passivation of Cu surface using self-assembled monolayer enhances the resistance against oxidation, which, in turn, enables moderately low-temperature bonding process at 300°C. Finally, thermal cycling test confirms the thermal stability of the 6-μm-pitch Cu-Cu daisy chain structure up to 1000 cycles. This work opens up new opportunity for wafer-level integration of bumpless Cu-Cu bonding to enable future high-bandwidth 3-D integrated circuit applications.
  • Keywords
    copper; integrated circuit interconnections; lead bonding; monolayers; oxidation; passivation; reliability; self-assembly; tape automated bonding; thermal stability; Cu sealing frame; Cu-Cu; Cu-Cu daisy chain structure; bond reliability; bonded structure; bumpless Cu-Cu bonding; copper surface; hermeticity; high-bandwidth 3D integrated circuit application; high-density bonded interconnect; low-temperature bonding process; oxidation; self-assembled monolayer; size 6 mum; temperature 300 degC; temporary passivation; thermal cycling test; thermal stability; three-dimensional wafer stacking; ultrafine pitch; wafer-level integration; wafer-on-wafer thermocompression bonding; Bonding processes; Copper; Integrated circuit interconnections; Passivation; Reliability; Seals; Three-dimensional integrated circuits; 3-D integrated circuit (IC); Cu–Cu bonding; fine pitch; hermetic seal; wafer-to-wafer (W2W);
  • fLanguage
    English
  • Journal_Title
    Electron Device Letters, IEEE
  • Publisher
    ieee
  • ISSN
    0741-3106
  • Type

    jour

  • DOI
    10.1109/LED.2012.2218273
  • Filename
    6332472