Adding error-correcting circuitry to ASIC memory

Thinking of putting ROM or RAM onto an application-specific IC? Then consider adding error-correction code (ECC) circuitry as well. Its presence boosts yield and reduces problems with random single-cell defects in memory arrays. Admittedly, the addition also expands chip area and impacts performance, but the payoff is almost always worth it. For instance, a memory that uses ECC will be more reliable in the field because a single memory cell failure will be corrected and not bring down the system; moreover, the now defective system component will not have to be replaced until the next scheduled maintenance. In fact, with ECC, 1 bit in every memory word can be bad and the memory will still operate correctly.